Welcome to the CO200 - Computer Organization and Architecture page.
- To understand how a computer works.
- To know the architecture and working of components inside a computer - Processor, Control unit, ALU, Memory, I/O.
- How is a machine language program executed by a computer?
- How does the software instruct the hardware to perform a desired action? How does the hardware instruct a desired unit to perform its corresponding operation?
- To gain insight into the setting in which our programs execute.
- To improve the setting in which our programs execute - to improve the performance of the system
Processor Basics - CPU organization, Data representation and Instruction Sets. Datapath Design - Adders, Subtracters, Multipliers, Dividers. Fixed point arithmetic - ALU. Floating point arithmetic. Control Design - Hardwired control, Microprogrammed control, Pipeline control. Memory Organization - Serial vs. Random Access Memories, Caches, Virtual Memory. Principles of Pipelining. Principles of Parallel Computing.
Surprise Quizzes + Assignments - 25%, Mid Sem - 25%, Final Exam - 50%.
- David Patterson and John Hennessy. Computer Organization and Architecture. 3ed and 4ed. Morgan Kaufmann.
- Kai Hwang and Faye Briggs. Computer Architecture and Parallel Processing. McGraw Hill.
- John P Hayes. Computer Architecture and Organization, 3ed. McGraw Hill.
Other References, Course supplements:
|Week 1||Course Introduction, Machine Models|
|Week 2||Data Representation|
|Week 3||Addressing Modes|
|Week 4||MIPS ISA|
|Assignment 1. Latex Submission Template. Assignment due on Friday, August 22nd, 4PM.|
|Week 5 - 6||Processor Basics|
|Week 6 - 7||Datapath Design - Adders|
|Week 8||Datapath Design - Multiplication Algorithms|
|Week 9||Midterm Examination|
|Week 10||Assignment 2|
|Verilog Class Tutorial|
|Week 10-11||Control Unit Design - Hardwired and Microprogrammed.|
|Week 12-13||The Processor Pipeline.|
|Week 14-15||The Memory Hierarchy.|
|Week 17||Interconnection Networks.|
|August 2||Dr. Janakiraman V, IBM, SRDC.||C Programming and the Assembly Language.|
|September 21||Viveka K R, IISc.||SRAM Design.|
|September 21||Dr. Balaji Venkataraman, IBM, SRDC.||DRAM Design.|