CS701 - High Performance Computing, July-Dec, 2015

Welcome to the CS701 - High Performance Computing course page.

Course Objectives

  • Provide systematic and comprehensive treatment of the components involved in the processor pipeline that extract instruction level parallelism.
  • Provide a strong foundation on memory hierarchy design and tradeoffs in both uniprocessor and multiprocessors.
  • Illustrate the cache coherence and consistency problems in multiprocessors, and their existing solutions.
  • Present the fundamentals of interconnection network design, architecture and implementation in a multiprocessor setting.

Course Syllabus

Click here for the detailed syllabus.

  • Moore's Law. Delay, Power, Energy. Dependability. Performance Quantification.
  • Instruction Level Parallelism: Pipelining, Branch prediciton, Scheduling, Speculation, Limits of ILP.
  • Multiprocessors: Symmetric and Distributed architectures. Programming models. Cache coherence protocols. ISA support for Synchronization. Memory consistency models.
  • Memory Hierarchy: Caches, Virtual Memory, Main Memory.
  • Interconnection Networks: Architectures, Topologies, Performance, Routing, Flow control.

Course Evaluation

Qtorials, Assignments - 30%, Course Project 10%, Mid Sem - 20%, Final Exam - 40%.

Reference Material

Reference Books/Textbooks:

  • John Hennessy and David Patterson. Computer Architecture - A Quantitative Approach. 5ed. Morgan Kaufmann.
  • John P. Shen and Mikko H. Lipasti. Modern Processor Design - Fundamentals of Superscalar Processors. Tata McGraw Hill.
  • William J Dally and Brian Towles. Principles and Practices of Interconnection Networks. Morgan Kaufmann. 2004.
  • Mark Hill/Margaret Martonosi (eds.). Synthesis Lectures on Computer Architecture, Morgan and Claypool, 2006 -- 2014.

Class Lectures/Assignments