CO262 - System Programming, Dec 2018 - May 2019

Welcome to the CO262 - System Programming, Dec 2018 - May 2019 course page. Click here for the course objectives, outcomes, and the detailed syllabus.

Course Syllabus

  • M1 - Pipelining, Hazards, Branch Prediction, Exceptions, Microarchitecture of superscalar processors.
  • M2 - Memory Systems. Memory hierarchy, SRAM, Cache Blocking, Cache coherence, DRAM, Virtual Machines, Virtual Memory, Non-Volatile Memory.
  • M3 - Input Output. Connecting and interfacing I/O devices. Memory mapped I/O, Interrupt driven I/O. DMA. Secondary storage.
  • M4 - Parallelism. Concept of Parallelism, ISA support for synchronization, Flynn’s Classification, Vector Processing, Multithreading, Shared Memory and Message passing multiprocessors, Heterogeneous Computing, Clusters, Warehouse computing.
  • M5 - Interconnection Networks. Topologies, Router Architecture, Flow control, Link design, Simulation.

Reference Books

  • [PH6e/PH5e/PH4e] David A Patterson and John L Hennessy. Computer Organization and Design - The Hardware/Software Interface. Elsevier.(6e, 2017 RISC-V edition; 5e, 2014 - MIPS/ARM edition; 4e, MIPS/ARM edition).
  • M. Morris Mano. Computer System Architecture. 3e. Pearson. 2007.

NPTEL Courses. Matthew Jacob - High Performance Computing, Bhaskaran Raman - Computer Organisation and Architecture, S. Raman - Computer Organization, Jatindra Kumar Deka - Computer Organisation and Architecture.

Course Evaluation

Quizzes, Tutorials, Assignments - 40%, Mid Sem - 20%, Final Exam - 40%.

Assignments/Lab Work

Assignment Description Submission Date
A1 RISC-V Datapath Components in Verilog - 1 9AM, January, 04, 2019.
A2 RISC-V Datapath Components in Verilog - 2 9AM, January, 11, 2019.
A3 RISC-V Datapath and Control Unit Verilog - 3 9AM, January, 21, 2019.
P Last Level Cache Simulator - Course Project 9AM, April, 08, 2019.

Tutorials

Class Lectures